The official source reports this update: ciflow/xpu/4629: Address review: spell out both backend requirements in skip reason. Review noted "For CUDA, SM89+ is required. For ROCm, MI300/MI350 is required." The predicate already encodes exactly that: is_sm_at_least_89() short-circuits on torch.version.cuda and is_MI300()/is_MI350() short-circuit on torch.version.hip, so only one arm can be true for a given build. Only the message was ambiguous, so make both backend requirements explicit.
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CUDA SM89+ and ROCm MI300/MI350 now explicitly required for skip reason
A review clarifies that CUDA 89+ and ROCm MI300/MI350 are required.
8 Sept 20261 verified claims1 sources1 observations
This official update documents a development concerning ciflow/xpu/4629: Address review: spell out both backend requirements in skip reason. Its practical significance depends on the scope and evidence stated by the source.
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